By Jeffrey Dastin and Max A. Cherney
SAN FRANCISCO (Reuters) -The production process that Intel hoped would pave the way to winning manufacturing deals and restore its edge in churning out high-end, high-margin chips is facing a big hurdle on quality as it puts newer technologies to the test, two people briefed on the matter told Reuters.
For months, Intel (INTC) has promised investors it would increase manufacturing using a process it calls 18A. It spent billions of dollars developing 18A, including the construction or upgrades of several factories, with the goal of challenging Taiwan’s chipmaking heavyweight, TSMC. Intel wants to round out its business designing chips that it largely makes in-house and TSMC helps it produce, with a contract manufacturing business that can compete with this key supplier. But whether Intel revives advanced chip production in the U.S. and gets its contract foundry on solid footing depends on closing the technology gap with TSMC.
Early tests disappointed customers last year, but Intel has said its 18A is on track to make its “Panther Lake” laptop semiconductors at high volume starting in 2025, which include next-generation transistors and a more efficient way to deliver power to the chip. The chipmaker has hoped that producing such an advanced in-house chip would grow external interest in its foundry, at a time when new CEO Lip-Bu Tan has explored a major shift to course-correct that fledgling business, Reuters previously reported.
Yet only a small percentage of the Panther Lake chips printed via 18A have been good enough to make available to customers, said the two people, who were briefed on the company’s test data since late last year. The sources spoke on condition of anonymity because Intel did not authorize them to disclose such information.
This percentage figure, known as yield, means Intel may struggle to make its high-end laptop chip profitably in the near future.
Yield may inch up or down as a foundry optimizes its manufacturing process. Companies also calculate yield in a variety of ways, which can make this critical data a moving goal post, the two people and two additional sources with knowledge of Intel’s manufacturing operation said.
Yields generally “start off low and improve over time,” Intel’s Chief Financial Officer David Zinsner told Reuters in a July 24 interview.
For Panther Lake, “it’s early in the ramp,” he said. In a statement on July 30, Intel added: “Our performance and yield trajectory gives us confidence this will be a successful launch that further strengthens Intel’s position in the notebook market.”
Intel in the past has aimed for a yield north of 50% before ramping production because starting any earlier risked damaging its profit margin, three of the sources said.
Intel typically does not make the lion’s share of its profit until yields reach roughly 70% to 80%, key for a chip as small as Panther Lake where many defects would make it a tough sell, the three people said. Profit also flows from market expansions and building up factory output, Intel said.
An immense yield increase would be a tall task by Panther Lake’s fourth-quarter launch, the two people with knowledge of Intel’s manufacturing operation said. But without such a jump, Intel may have to sell some chips at a lower profit margin or at a loss, the two sources briefed on test data said.
Panther Lake is “fully on track,” Intel said in its July 30 comment. Intel did not specify the yield threshold at which its chips become profitable.
The company has warned it could exit leading-edge manufacturing entirely if it does not land external business for 14A, which is 18A’s next-generation successor.
‘HAIL MARY’
Intel’s 18A process involved big manufacturing changes and introduced newer technologies all at once, such as a next-generation transistor design and a feature that would improve the delivery of energy to a chip. This created manufacturing risks due to the complexity of fabricating chips, three of the sources said.
Intel took on this challenge to close the performance gap with TSMC, but its aggressive timeline for a rollout of unproven systems set it up for failure, said the two people briefed on the company’s test data. One likened the effort to a “Hail Mary” football pass.
In April, Intel said it had begun a crucial step toward printing Panther Lake chips via 18A known as “risk production.” The company also showed off several laptops it said used Panther Lake chips at the Taiwan Computex expo in May.
But problems have persisted.
One way chip manufacturers gauge progress is to measure the number of defects per area of a chip, which can vary based on a semiconductor’s design. Relative to industry standards, the Panther Lake chips had about three times too many defects for Intel to start high-volume production, the two sources briefed on test data said.
As of late last year, only around 5% of the Panther Lake chips that Intel printed were up to its specifications, these sources said. This yield figure rose to around 10% by this summer, said one of the sources, who cautioned that Intel could claim a higher number if it counted chips that did not hit every performance target. Reuters could not establish the precise yield at present.
In the interview with Reuters, Zinsner disputed these figures and said “yields are better than that.” He did not give a number for July or late 2024, and Intel declined to provide this data.
“Our expectation is every month they’ll get better and better, such that we’re at a yield level that is good for production-level Panther Lake at the end of the year,” he said, adding: “I wouldn’t say that margins are accretive even at those yield levels, so we still have to make improvement.”
Tan has tapped supply-chain contacts more than usual for Intel and has given them data to help improve chip yields, Zinsner said.
For now, Intel remains partly dependent on TSMC to make its in-house designed chips. An Intel executive said in June that Nova Lake, a chip it is planning after Panther Lake, will be made partly on TSMC, too.
(Reporting by Max A. Cherney and Jeffrey Dastin in San Francisco; Additional reporting by Stephen Nellis; Editing by Sayantani Ghosh, Matthew Lewis and Anna Driver)
